1. Field of the Invention
The present invention relates to a semiconductor device, a substrate for a semiconductor device, a method of manufacture thereof, and an electronic instrument.
2. Description of Related Art
With increasingly high functionality of semiconductor devices, there is a demand for higher pin count and more compactness, for which purpose Ball Grid Array (BGA) types and Chip Size/Scale Package (CSP) types of package have received attention. These packages have a wiring pattern and external terminals formed on a substrate, and a semiconductor chip is bonded to the wiring pattern, and sealed with resin.
Conventionally, a substrate used in these packages is formed of resin, as a result of which there are problems of inadequate flatness and heat dispersion. If the flatness is inadequate, faulty mounting on a mounting substrate may occur, and if the heat dispersion is inadequate the performance as a semiconductor device may be impaired. Therefore, a stiffener is adhered to the substrate for the purpose of ensuring flatness, and to assist heat dispersion a heat spreader is adhered.
Therefore, a package using the substrate commonly requires a stiffener and a heat spreader, and so there is the problem that the manufacturing cost is increased.
It should be noted that if a metallic substrate is used, the problems of flatness and heat dispersion are eliminated. However, with a metallic substrate, if the wiring pattern and external terminals are formed on opposite sides, it is difficult to achieve electrical insulation. That is to say, the wiring pattern and the external terminals are electrically connected through through holes formed in the substrate, and with a metallic substrate it is difficult to achieve electrical insulation within the through holes.
The present invention is made in consideration of these problems, and has as its object the provision of a semiconductor device, a substrate for a semiconductor device, a method of manufacture thereof, and an electronic instrument, such that a substrate of excellent flatness and heat dispersion is used, and moreover the manufacturing cost can be kept down.
(1) According to a first aspect of the present invention, there is provided a semiconductor device comprising:
a substrate for a semiconductor device, wherein the substrate includes a core layer formed of a metal that promotes heat dispersion, a through hole formation portion formed in the core layer, a plurality of through holes formed in the through hole formation portion, insulating layers formed on both sides of the core layer, and wires formed on the insulating layer and achieving electrical conductivity through the through holes from one surface to the other of the core layer; and
a semiconductor chip provided on the substrate for a semiconductor device, and having electrodes electrically connected to the wires.
The flatness and heat dispersion of the substrate are ensured by the core layer. The wires electrically connecting both sides of the core layer are formed in through holes in the through hole formation portion, which is of a distinct material from the core layer, and therefore electrical insulation of the wires and core layer can be achieved. In this aspect of the present invention, as a metal promoting the dispersion of heat can be used a metal having a high thermal conductivity and a certain surface area.
(2) An opening may be formed in the core layer, and the through hole formation portion may be formed by filling this opening with an insulating material, and the through holes may be formed in this insulating material.
Since the area of the insulating material is defined by the opening, the through hole formation portion can be easily formed.
(3) As the insulating material may be used a resin.
(4) The opening may be formed in at least one of a peripheral portion and a central portion of the core layer.
In this way, there is no particular restriction on the position of the opening.
(5) The semiconductor chip may be disposed on the central portion of the core layer and may be also mounted over at least one of the through holes.
By the formation of the through holes under the semiconductor chip, a large number of through holes can be formed.
(6) The semiconductor chip may be mounted over the through hole through an adhesive. In this case, the function of air escape is facilitated by the through holes.
(7) As the adhesive may be used a thermally conductive material. In this case, heat transmitted from the adhesive is cooled in the through holes. (8) The through holes may be disposed in zigzag.
This makes it possible to form a large number of through holes, and the demand for high pin count can be met.
(9) The opening may be formed on the peripheral portion of the core layer along the edge of the core layer, with an opening length longer close to the peripheral portion than close to the central portion of the core layer. The through holes may be arranged in zigzag on a plurality of phantom lines that are imagined to be over the opening and to extend parallel to a longitudinal direction of the opening. The number of the through holes arranged on one of the phantom lines that is close to the edge of the core layer may be larger than the number of the through holes arranged on one of the phantom lines that is close to the central portion of the core layer.
By means of this, the opening can be formed with an opening length longer close to the periphery than close to the center region of the core layer. Therefore, a larger number of through holes can be formed in the opening close to the periphery of the core layer than close to the center of the core layer. Since the through holes are arranged in zigzag, wiring can be carried out easily. By disposing the through holes in zigzag, a large number of through holes can be formed, and as a result the demand for high pin count can be met.
(10) The wires may include inner leads extending from the through holes toward the central portion of the core layer, and connected to electrodes of the semiconductor chip.
Since the inner leads are drawn out from the zigzag through holes, the inner leads drawn out from the through holes formed close to the periphery of the core layer in the opening are made easier to avoid the through holes formed close to the center of the core layer.
(11) According to a second aspect of the present invention, there is provided a substrate for a semiconductor device, comprising:
a core layer formed of a metal that promotes heat dispersion;
a through hole formation portion formed in a part of the core layer;
a plurality of through holes formed in the through hole formation portion;
insulating layers formed on both sides of the core layer; and
wires formed on the insulating layers and achieving electrical conductivity through the through holes from one surface to the other of the core layer.
According to this aspect of the present invention, the flatness and heat dispersion of the substrate are ensured by the core layer, and by virtue of the formation of the through holes in the through hole formation portion that is of a distinct material from the core layer, electrical insulation of the wires and core layer can be achieved. In this aspect of the invention, as a metal promoting heat dispersion can be used a metal having a high thermal conductivity and a certain surface area.
(12) An opening may be formed in the core layer, and the through hole formation portion may be formed by filling this opening with an insulating material, and the through holes may be formed in this insulating material.
Since the area of the insulating material is defined by the opening, the through hole formation portion can be easily formed.
(13) As the insulating material may be used a resin.
(14) The opening may be formed in at least one of a peripheral portion and a central portion of the core layer.
In this way, there is no particular restriction on the position of the opening.
(15) The through holes may be disposed in zigzag.
Since a large number of through holes can be formed in this substrate for a semiconductor device, this substrate can be used for a semiconductor device such that a high pin count is required.
(16) The opening may be formed on the peripheral portion of the core layer along the edge of the core layer, with an opening length longer close to the peripheral portion than close to the central portion of the core layer. The through holes may be arranged in zigzag on a plurality of phantom lines that are imagined to be over the opening and to extend parallel to a longitudinal direction of the opening. The number of the through holes arranged on one of the phantom lines that is close to the edge of the core layer may be larger than the number of the through holes arranged on one of the phantom lines that is close to the central portion of the core layer.
By means of this, the opening can be formed with an opening length longer close to the periphery than close to the center region of the core layer. Therefore, a larger number of through holes can be formed in the opening close to the periphery of the core layer than close to the center of the core layer. Since the through holes are formed in zigzag, wiring can be carried out easily. By disposing the through holes in zigzag, a large number of through holes can be formed, and as a result the demand for high pin count can be met.
(17) The wires may comprise inner leads extending from the through holes toward the central portion of the core layer, and plating leads extending from the through holes toward outside of the core layer.
The inner leads and plating leads are drawn out from the zigzag through holes. Therefore, the inner leads drawn out from the through holes formed close to the periphery of the core layer in the opening are made easier to avoid the through holes formed close to the center of the core layer. The plating leads drawn out from the through holes formed close to the center of the core layer in the opening are made easier to avoid the through holes formed close to the periphery of the core layer. It should be noted that here the plating leads are used when carrying out electroplating.
(18) A first opening may be formed in a central portion of the core layer, and a second opening may be formed in a peripheral portion of the core layer. The through hole formation portion may be formed by filling the first and second openings with an insulating material. A first group of the through-holes may be formed in zigzag in the insulating material within the first opening, and a second group of the through holes may be formed in zigzag in the insulating material within the second opening. A first group of the wires may be formed to extend from through holes of the first group to short of the second opening, and a second group of the wires may be formed to extend from through holes of the second group to short of the first opening, the first and second groups of wires being disposed in an alternating fashion.
(19) According to a third aspect of the present invention, there is provided a substrate for a semiconductor device comprising:
a core layer formed of a metal that promotes heat dispersion;
insulating layers formed on both sides of the core layer;
a plurality of through hole formation portions formed around each of a plurality of semiconductor chip mounting regions in the core layer;
a plurality of through holes formed on both sides of a central portion of each of the through hole formation portions;
a plating wire passing over the central portion of each of the through hole formation portions;
plating leads connecting from the plating wires to the through holes; and
inner leads extending from the through holes to over the insulating layers outside the through hole formation portions.
The flatness and heat dispersion of the substrate are ensured by the core layer, and by virtue of the formation of the through holes in the through hole formation portion that is of a distinct material from the core layer, electrical insulation of the wires and core layer can be achieved.
A plurality of semiconductor chips can be mounted on this substrate, and by cutting in predetermined positions individual semiconductor devices can be fabricated. A plurality of through hole formation portions are formed around each semiconductor chip mounting region, a plurality of through holes are formed on both sides of a central portion of each through hole formation portion, and inner leads extend from the through holes. When this substrate for a semiconductor device is cut at the central portion of each through hole formation portion into single pieces, each of the single pieces has inner leads drawn out from the through holes. Plating leads are connected to the through holes, and the plating leads are each connected to the plating wire. Therefore, through the plating wire and plating leads, electroplating can be carried out on the inner leads. Moreover, since the plating wire is formed over the central portion of each through hole formation portion, if the substrate for a semiconductor device is cut up using a cut wider than the width of the plating wire in this position, the electrical connections among the plating leads are removed, and the inner leads are also no longer electrically connected. In this aspect of the invention, as a metal promoting heat dispersion can be used a metal having a high thermal conductivity and a certain surface area.
(20) Openings may be formed in the core layer; the through hole formation portions may be formed by filling the openings with an insulating material; and the through holes may be formed in the insulating material.
Since the area of the insulating material is defined by the openings, the through hole formation portions can be easily formed.
(21) According to a fourth aspect of the present invention, there is provided a method of manufacture of a semiconductor device, comprising the steps of:
providing a substrate including a metal portion and an insulating portion;
forming a plurality of through holes in the insulating portion;
providing a conductive member within each of the through holes;
attaching a semiconductor chip to one surface of the substrate;
providing external terminals on the other surface of the substrate; and
forming wires electrically connecting the semiconductor chip and the external terminals through the conductive member, with an insulating layer interposed over the metal portion.
According to this aspect of the present invention, a semiconductor device can be obtained in which the flatness and heat dispersion of the substrate are ensured, and the electrical insulation between the conductive member and metal portion is achieved.
(22) The step of providing the substrate may include a step of forming a hole in a metal plate, and a step of forming the insulating portion in the hole.
In this way, a substrate including the metal portion and the insulating portion can be obtained.
(23) The step of providing the substrate and the step of forming the wires may be carried out by: providing an adhesive that is the material for the insulating portion and the insulating layer on both surfaces of the metal plate and within the holes; applying a metal foil that is the material for the wires; and etching the metal foil.
By simply applying the metal foil with the adhesive interposed, the insulating portion can be formed simply, and the wires can be formed on the metal portion with the insulating layer interposed.
(24) According to a fifth aspect of the present invention, there is provided a method of manufacture of a semiconductor device, comprising the steps of:
providing a substrate including a metal portion having a plurality of semiconductor chip mounting regions, and a plurality of insulating portions formed around each of the semiconductor chip mounting regions;
forming a plurality of through holes on both sides of a phantom line crossing each of the insulating portions;
forming wires including a plating wire extending along the phantom line of each of the insulating portions, plating leads connecting from the plating wire to the through holes, and inner leads extending from the through holes with an insulating layer interposed to over the metal portion;
providing a conductive member within each of the through holes;
attaching a plurality of semiconductor chips to one surface of the substrate and connecting electrodes of each of the semiconductor chips to the inner leads; and
cutting the substrate into a plurality of single pieces while cutting away the plating wire.
A plurality of semiconductor chips can be mounted on the metal portion, and by cutting in predetermined positions individual semiconductor devices can be fabricated. A plurality of insulating portions are formed around each semiconductor chip mounting region. A plurality of through holes are formed on both sides of the phantom line crossing each insulating portion, and inner leads extend from the through holes. When this substrate is cut along the phantom line crossing each insulating portion into single pieces, each of the single pieces has inner leads drawn out from the through holes. Plating leads are connected to the through holes, and the plating leads are each connected to the plating wire. Therefore, through the plating wire and plating leads, electroplating can be carried out on the inner leads. Moreover, the plating wire is formed along the phantom line crossing each insulating portion. Since the substrate is cut up while cutting away the plating wire in this position, the electrical connections among the plating leads are removed, and the inner leads are also no longer electrically connected.
(25) The step of providing the substrate may include a step of forming holes in a metal plate, and a step of forming the insulating portions in the holes.
In this way, a substrate including the metal portion and the insulating portions can be obtained.
(26) The step of providing the substrate and the step of forming the wires may be carried out by: providing an adhesive that is the material for the insulating portions and the insulating layer on both surfaces of the metal plate and within the holes; applying a metal foil that is the material for the wires; and etching the metal foil.
By simply applying the metal foil with the adhesive interposed, the insulating portions can be formed simply, and the wires can be formed on the metal portion with the insulating layer interposed.
(27) According to a sixth aspect of the present invention, there is provided a method of manufacture of a substrate for a semiconductor device, comprising the steps of:
forming a hole in a metal plate, forming an insulating portion in the hole, and forming a plurality of through holes in the insulating portion.
According to this method, flatness and heat dispersion are ensured, and a substrate for a semiconductor device can be obtained in which the electrical insulation of the conductive member and the metal portion is achieved.
(28) According to a seventh aspect of the present invention, there is provided a method of manufacture of a substrate for a semiconductor device, comprising the steps of:
providing a metal plate, forming a plurality of holes around a plurality of semiconductor chip mounting regions on the metal plate, and forming an insulating portion in each of the holes;
forming a plurality of through holes on both sides of a phantom line crossing the insulating portion;
forming wires including a plating wire extending along the phantom line of the insulating portion, plating leads connecting from the plating wire to the through holes, and inner leads extending from the through holes with an insulating layer interposed to over the metal plate; and
providing a conductive member within each of the through holes.
A plurality of semiconductor chips can be mounted on the metal plate, and by cutting in predetermined positions individual semiconductor devices can be fabricated, according to this method of manufacture of a substrate for a semiconductor device. A plurality of insulating portions are formed around each semiconductor chip mounting region. A plurality of through holes are formed on both sides of the phantom line crossing each insulating portion, and inner leads extend from the through holes. When this substrate is cut along the phantom line crossing each insulating portion into single pieces, each of the single pieces has inner leads drawn out from the through holes. Plating leads are connected to the through holes, and the plating leads are each connected to the plating wire. Therefore, through the plating wire and plating leads, electroplating can be carried out on the inner leads. Moreover, the plating wire is formed along the phantom line crossing each insulating portion. If in this position, the substrate is cut up using a cut wider than the width of the plating wire, the electrical connections among the plating leads are removed, and the inner leads are also no longer electrically connected.
(29) The step of forming the insulating portion and the step of forming the wires may be carried out by: providing an adhesive that is the material for the insulating portion and the insulating layer on both surfaces of the metal plate and within the holes; applying a metal foil that is the material for the wires; and etching the metal foil.
(30) According to an eighth aspect of the present invention, there is provided an electronic instrument having a circuit board on which is mounted the above described semiconductor device.